MACHINE=[BOARD_NAME] source ~.sh -b [BUILD_DIR]/ -e [x11/~] 以x11為例
ENV setup過後, [BUILD_DIR]就存在了, 以後想要建立build environment的話並不需要再度建立, 而是用這個指令讀取建立即可
Restarting a build environment:
source setup-environment [BUILD_DIR]
整份全build: // 副作用未知, changes會被還原?! 待確認
bitbake fsl-image-x11
列出可得的package:
bitbake -s
Linux kernel coding:
modified_then_build () {
bitbake virtual/kernel -c compile -f
bitbake virtual/kernel -c deploy
}
built_then_get_images () {
//go to [BUILD_DIR]/tmp/deploy/images/[BOARD_NAME]/
//find -> uImage-[BOARD_NAME].bin ,save as uImage
// ->uImage-~~~~~~~~~~~.dtb , save as [BOARD_NAME].dtb
// ->uImage-~~~~~~~~~~~-hdcp.dtb,save as [BOARD_NAME]-hdcp.dtb
// ->uImage-~~~~~~~~~~~-ldo.dtb , save as [BOARD_NAME]-ldo.dtb
}
U-boot coding:
modified_then_build () {
bitbake -c compile u-boot-imx -f
bitbake -c deploy u-boot-imx
}
built_then_get_images () {
//go to [BUILD_DIR]/tmp/deploy/images/[BOARD_NAME]/
//find -> u-boot.imx , save as something
// $ dd if=u-boot.imx of=[SDCARD] bs=512 seek=2
}
Board info tuning:
New kernel of L3.10 uses device tree, all those hardware related config will be passed from dtb to kernel, you can refer to arch/arm/boot/dts/imx6q.dtsi, arch/arm/boot/dts/imx6qdl.dtsi and arch/arm/boot/dts/imx6qdl-sabresd.dtsi's ecspi node. grep spi in these three files to see how device tree works.
replace "spi" to whatever you're looking for.~ https://community.freescale.com/thread/317999
GPIO 設定:
http://www.kosagi.com/w/index.php?title=Definitive_GPIO_guide
IOMUX 參數設定:
舊版freescale作法
所有定義寫在
~/arch/arm/plat-mxc/include/mach/iomux-mx6dl.h
~/arch/arm/plat-mxc/include/mach/iomux-v3.h
組合成像是 MX6DL_PAD_CSI0_DAT4__IPU1_CSI0_D_4 的巨集
另外使用一個標頭檔
~/arch/arm/mach-mx6/board-mx6dl_sabresd.h
把你要的寫進去
在 .init_machine 時, 讀取啟動
新版freescale作法(Device Tree)
所有定義寫在
~/arch/arm/boot/dts/imx6dl-pinfunc.h
#define MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x074 0x388 0x000 0x0 0x0
在 imx6q.dtsi imx6qdl.dtsi imx6qdl-sabresd.dtsi 中
區段中宣告啟動
pinctrl_ipu1_csi0_d4_d7: ipu1-csi0-d4-d7 {
fsl,pins = < MX6QDL_PAD_CSI0_DAT4__IPU1_CSI0_DATA04 0x80000000 MX6QDL_PAD_CSI0_DAT5__IPU1_CSI0_DATA05 0x80000000 MX6QDL_PAD_CSI0_DAT6__IPU1_CSI0_DATA06 0x80000000 MX6QDL_PAD_CSI0_DAT7__IPU1_CSI0_DATA07 0x80000000 >;
};
關於pin setting, 論壇有回答
Every pin needs to have its PAD configured in the dts file. For example:
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
The explanation of what these values mean is available at:
Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
and
Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
The 0x80000000 means that the kernel will not touch the PAD settings and it will use whatever comes from default (or from U-boot in case it was previously configured in U-boot).
Regards,
Fabio Estevam
~ https://community.freescale.com/thread/317876MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x130b0
MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000
The explanation of what these values mean is available at:
Documentation/devicetree/bindings/pinctrl/fsl,imx6q-pinctrl.txt
and
Documentation/devicetree/bindings/pinctrl/fsl,imx-pinctrl.txt
The 0x80000000 means that the kernel will not touch the PAD settings and it will use whatever comes from default (or from U-boot in case it was previously configured in U-boot).
Regards,
Fabio Estevam
順便看這個 https://www.kernel.org/doc/Documentation/pinctrl.txt
pin control追"fsl,pins"字眼
查 drivers/pinctrl/pinctrl-imx.c 可以看到如何解析fsl,pins結構
Each pin represented in fsl,pins consists of 5 u32 PIN_FUNC_ID and 1 u32 CONFIG, so 24 types in total for each pin.
....
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